Article View: comp.sys.intel
Article #171682389
From: Tom Tegeler
Date: Tue, 26 Apr 1988 19:28
Date: Tue, 26 Apr 1988 19:28
24 lines
1537 bytes
1537 bytes
I am presently physically modelling the intel 82389 (message passing
coprocessor). In other words I am using a real 82389 to generate the
functional information needed for CAE simulation.
I am running into several problems getting this thing to function as per
documentation. I would appreciate any information regarding the following
problems or any information about the 82389 in general. I have never used
this part or any part related to it, so please pardon my ignorance.
1) At reset documentation states BUSERR* should be high. My tests have
BUSERR* being low. What would cause BUSERR* to be low at reset.
2) 82389 documentation shows signal states during reset. Several of these
signals are open-collector signals. Does this table show the state of
open-collector signals with or without pullups.
3) During unsolicited message transmission all zeros are written to
the message command port after the transmit fifo has been loaded with
the message. After writing zeros to the message command port does the
MPC immediately begin arbitrating for the bus.
4) The 82389 data sheet does not specify a maximum clock period. Is this
part really non-dynamic. (No internal registers need refresh.)
Technical Details
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Path: arc1-ca.pugleaf.net!utzoo!mnetor!uunet!cadnetix.COM!tomt From: tomt@cadnetix.COM (Tom Tegeler) Newsgroups: comp.sys.intel Subject: 82389 Message-ID: <2461@cadnetix.COM> Date: 26 Apr 88 19:28:39 GMT Distribution: na Organization: Cadnetix Corp., Boulder, CO Lines: 24 Keywords: 82389, Making it work.