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Article #1853Re: Question for 8255 Guru
From: Clarence W. Wilkerson
Date: Tue, 31 Jan 1989 02:49
Date: Tue, 31 Jan 1989 02:49
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In article <7184@pyr.gatech.EDU>, is813cs@pyr.gatech.EDU (Cris Simpson) writes: > > I am having trouble figuring out the INTR abilities of the 8255A. > I understand that the 8255A signals the x86 on the INTR line, then I believe that the interrupt is handled by the 8259. On an 8085 system, the processor sends the 8259 3 INTA- signals. After the first, the 8259 emits a CALL opcode, then two more bytes of prprogrammed interrupt vector. On an 8088, the CALL is not emitted. I don't think the 8255 has any interrupt capabilities. The Zilog 8 bit PIO probably has something like you describe.
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Path: arc1-ca.pugleaf.net!utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!iuvax!ndcheg!ndmath!cww From: cww@ndmath.UUCP (Clarence W. Wilkerson) Newsgroups: comp.sys.intel Subject: Re: Question for 8255 Guru Summary: I believe the interrupt mask is put on the bus by the interrupt controller, 8259?? Message-ID: <1301@ndmath.UUCP> Date: 31 Jan 89 02:49:05 GMT References: <7184@pyr.gatech.EDU> Distribution: usa Organization: Math. Dept., Univ. of Notre Dame Lines: 12