🚀 go-pugleaf

In article <1992Aug18.123732.16517@nstn.ns.ca> maceache@fox.nstn.ns.ca (Tim Maceachern) writes:
>
>I hope that Intel can fix the 860 FP unit before incorporating it into
>P5.  The paranoia FP test suite has some disparaging things to say about
>the i860s in an Alliant I worked on...
>
>*******************************************************************
>*         Tim MacEachern         * Tim_MacEachern@hawk.nstn.ns.ca *
>*     Software Kinetics Ltd.     *  or maceache@hawk.nstn.ns.ca   *

This isn't really the i860's fault but rather the Alliant's trap
handler.  Like many (most?) newer chips, the i860 doesn't handle IEEE
exceptions in hardware.  Also, the state-save and restore of the i860
is extraordinarly complex, so many implementors choose to punt on the
trap handler.  Also, the overhead of handling denormalized numbers
(which are essential for paranoia) is quite high on the i860, so many
compilers (including Alliant's) choose to set a mode where denorms
flush to zero.  The i860 doesn't have an IEEE-conforming divide
instruction, so an (expensive) IEEE-conforming divide routine is
required.  Finally, the quality of the exponentiation routine is
critical to paranoia, and this is a software-only issue.

Anyway, many compilers provide an ieee-conforming option that will
allow paranoia to pass.

The lack of the divide instruction is probably the most serious defect
in the i860 implementation (but remember, it does division the same way
as the Cray-1).  It would be nice if the chip handled Nan and Inf in
hardware.  Many users don't care about denorms, paranoia & Dr. Kahan
non-withstanding.
-- 
Larry Meadows		The Portland Group
lfm@pgroup.com