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Article #565

Re: Future of i860 line

#565
From: John Friedman
Date: Wed, 02 Sep 1992 16:30
13 lines
971 bytes
mneideng@thidwick.acs.calpoly.edu (Mark Neidengard) writes:
> Wait up.  You speak as if the i860 is not superscalar; it sure as heck IS!
> 
> It has MULTIPLE pipelines, which can be used concurrently.  That's the
> textbook definition of superscalar microprocessing.

Actually, superscalar means that the processor can START executing
instructions concurrently, in the same clock cycle, that is.  The 860's
cannot do this, but they can be processing multiple instructions at the same
time that started at different times.

John Friedman
friedman@col.hp.com
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Message-ID: <1992Sep2.163031.15523@col.hp.com>
Path: arc1-ca.pugleaf.net!sparky!uunet!gumby!wupost!sdd.hp.com!hp-col!friedman
References: <1992Aug29.002928.166786@zeus.calpoly.edu>

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Newsgroups: comp.sys.intel
Path: arc1-ca.pugleaf.net!sparky!uunet!gumby!wupost!sdd.hp.com!hp-col!friedman
From: friedman@col.hp.com (John Friedman)
Subject: Re: Future of i860 line
Sender: news@col.hp.com (Usenet News)
Message-ID: <1992Sep2.163031.15523@col.hp.com>
Date: Wed, 2 Sep 1992 16:30:31 GMT
References: <1992Aug29.002928.166786@zeus.calpoly.edu>
Organization: HP Colorado Springs Division
Lines: 14