🚀 go-pugleaf

In article <1992Sep2.163031.15523@col.hp.com>, friedman@col.hp.com (John Friedman) writes:
|> mneideng@thidwick.acs.calpoly.edu (Mark Neidengard) writes:
|> > Wait up.  You speak as if the i860 is not superscalar; it sure as heck IS!
|> > 
|> > It has MULTIPLE pipelines, which can be used concurrently.  That's the
|> > textbook definition of superscalar microprocessing.
|> 
|> Actually, superscalar means that the processor can START executing
|> instructions concurrently, in the same clock cycle, that is.  The 860's
|> cannot do this, but they can be processing multiple instructions at the same
|> time that started at different times.

In that case, the i860 does meet the definition of superscalar, as an integer
core instruction and a FPU instruction can be started in the same cycle using DIM
(Dual Instruction Mode).  Also, a single FPU instruction can use both the
multiply and add pipelines.  Thus, in the limit, it is possible to have both
floating point pipelines and the integer core all working due to instructions
that were started in the same cycle.

I agree the i860 is not superscalar, so your definition must be flawed.  I
suspect a better definition might include some words about the processor
selecting which instructions to execute simultaneously.  The i860 doesn't do
that, but some members of the i960 family do.

[I'm not an Intel officer, so I don't speak for Intel.]
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