Article View: comp.sys.intel
Article #679Interrupt Gates on the i376
From: Andy Smoak
Date: Thu, 13 Sep 1990 19:30
Date: Thu, 13 Sep 1990 19:30
33 lines
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1701 bytes
I have a question about the interrupt gates on the 376 processor.
The i486 MicroProcessor Programmer's Reference Manual (and the 386DX
manual) define the interrupt gates (starting at whatever location
+ 4) as having bits 0-4 as reserved, bits 5-7 to be 000, and bits
8-12 to be 01110 (bit 8 first). (This is on pg. 9-8 of my copy).
The 376 Embedded Processor Programmer's Reference Manual defines the
interrupt gates (starting at whatever location
+ 4) as having bits 0-4 as reserved, bits 5-7 to be 010, and bits
8-12 to be 00110 (bit 8 first). (This is on pg. 8-7 of my copy).
Two questions about this:
1) Could the 376 Manual be incorrect about these settings? I pointed this
out to our hardware guys, and they were suprised to see this difference
(esp. between the 386DX and the 376).
2) If the 376 Manual is correct, what types of problems would you see if
you set the interrupt gates up as if this were a 486 or 386 instead
of the 376 settings? I guess what I'm asking here is what are these
fixed bits used for?
Please e-mail your responses.
Thanks in advance.
Andy Smoak
Distributed Processing Center, NCR E&M Columbia
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arc1-ca.pugleaf.net!utzoo!utgpu!news-server.csri.toronto.edu!rutgers!usc!zaphod.mps.ohio-state.edu!uakari.primate.wisc.edu!dali.cs.montana.edu!milton!ogicse!emory!hubcap!ncrcae!asmoakShow Full Headers
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Path: arc1-ca.pugleaf.net!utzoo!utgpu!news-server.csri.toronto.edu!rutgers!usc!zaphod.mps.ohio-state.edu!uakari.primate.wisc.edu!dali.cs.montana.edu!milton!ogicse!emory!hubcap!ncrcae!asmoak From: asmoak@ncrcae.Columbia.NCR.COM (Andy Smoak) Newsgroups: comp.sys.intel Subject: Interrupt Gates on the i376 Keywords: i376, Interrupt Gates, HELP Message-ID: <6562@ncrcae.Columbia.NCR.COM> Date: 13 Sep 90 19:30:02 GMT Distribution: usa Organization: NCR Corp., Engineering & Manufacturing - Columbia, SC Lines: 33