Article View: comp.sys.intel
Article #888Re: LOADALL and the 486
From: Rod Skinner
Date: Fri, 06 Nov 1992 04:52
Date: Fri, 06 Nov 1992 04:52
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In article <Bx9A8o.I23@watserv1.uwaterloo.ca> ajrooks@mansci1.UWaterloo.ca (Alan Rooks) writes: >marcusj@apricot.co.uk (Marcus Jenkins) writes: >>I know this may be an FAQ, but I am just a little confused. Is >>LOADALL implemented in the 486? > >[more stuff about LOADALL, asks for email answers] > >FAQ or no, could someone post or give references for the documented >"undocumented" instructions? Someone else mentioned bit-string ops on >the 386. > >Thanks in advance, >Alan Rooks University of Waterloo ajrooks@mansci1.uwaterloo.ca LOADALL is an instruction that was intended for ICE support. The early versions of the 80386DX had the instruction available but was removed as the die size was reduced. It is still there in the chip that accompanies each ICE product. I have not heard differently so I would expect that the same is true of the Intel486 CPU family. There is a faster sequence of instructions that perform the same function as LOADALL which was provided to those using it. Noone uses it today other than the ICE software (if even that). rod Rod Skinner I speak for myself only. Intel Corp 3065 Bowers Avenue MS NW1-20 PH (408) 765-4474 Santa Clara, CA 95052 FAX (408) 765-4920
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arc1-ca.pugleaf.net!sparky!uunet!cis.ohio-state.edu!zaphod.mps.ohio-state.edu!cs.utexas.edu!sun-barr!olivea!inews.Intel.COM!mipos2!rskinnerReferences:
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Path: arc1-ca.pugleaf.net!sparky!uunet!cis.ohio-state.edu!zaphod.mps.ohio-state.edu!cs.utexas.edu!sun-barr!olivea!inews.Intel.COM!mipos2!rskinner From: rskinner@mipos2.intel.com (Rod Skinner) Newsgroups: comp.sys.intel Subject: Re: LOADALL and the 486 Message-ID: <BxA2w6.JB5@inews.Intel.COM> Date: 6 Nov 92 04:52:54 GMT References: <1992Nov04.155003.25751@apricot.co.uk> <Bx9A8o.I23@watserv1.uwaterloo.ca> Sender: news@inews.Intel.COM (USENET News System) Organization: Intel Corporation, Santa Clara, CA USA Lines: 31 Nntp-Posting-Host: mipos2