🚀 go-pugleaf

RetroBBS NetNews Server

Inspired by RockSolid Light RIP Retro Guy

Article View: comp.sys.intel
Article #713

Zero wait state and caches

#713
From: nat-3 System Administrator
Date: Thu, 04 Oct 1990 21:42
31 lines
1247 bytes
Hello --

	I have a 25 MHz 386 motherboard with no cache, but with
plenty of 70 ns DRAM that provides zero wait state performance.
Is there any reason that a cache would boost performance on my
machine?  My (very limited, probably incorrect, software-oriented)
reasoning is NO:

	-	My 386 places a memory request on the bus in one
		CPU cycle.

	-	Since I have zero wait state memory, my DRAMS
		will satisfy the request in the next CPU cycle.

	-	You can't do better than that, so ...

	-	A cache will not boost performance.

Would someone please tell me where I am right and where I am wrong?

Please respond by e-mail since I do not subscribe to this newsgroup.

				Thank you very much,

					John
-- 
John R. Meyer			Path:   ...!uunet!nat-3!root
10208-C Ashbrooke Ct.		Domain: root@nat-3.UUCP
Oakton, VA  22124		Phone:  (703) 281-5157 (H)
USA					(703) 802-1872 (O)
Technical Details
Message-ID: <188@nat-3.UUCP>
Path: arc1-ca.pugleaf.net!utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!uunet!nat-3!root

Show Full Headers
Complete Article Headers
Path: arc1-ca.pugleaf.net!utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!uunet!nat-3!root
From: root@nat-3.UUCP (nat-3 System Administrator)
Newsgroups: comp.sys.intel
Subject: Zero wait state and caches
Keywords: wait states, cache
Message-ID: <188@nat-3.UUCP>
Date: 4 Oct 90 21:42:16 GMT
Organization: White Spot (North)  Oakton, VA
Lines: 31