🚀 go-pugleaf

In article <2542@batcomputer.tn.cornell.edu> chow@tcgould.tn.cornell.edu (Christopher Chow) writes:
>In article <2653@okstate.UUCP> norman@a.cs.okstate.edu (Norman Graham) writes:
>>Does anyone out there know what it would take to have demand paging virtual 
>>memory on the Mac II?  Could it be as simple as plugging in a 68851 and 
>>writing an interrupt handler to take care of swapping the pages?
>>
>
>One thing which you might want to question is whether if you want to add an
>68851 MMU to your Mac II.  I'm not a hardware guru, but from what
>understand, the 68851 chip adds wait state(s) to every memory reference.
>How's that for slowing down your machine.  Note that Suns, etc., all use
>their custom MMU chips to avoid the wait state problems with the Motorola
>chip.
>
>Christopher Chow

I'm not a hardware guru either, so take this with a grain of whatever's handy.
Document BR299 from Motorola ("MC68851: Technical Summary") says: "The address
translation mechanism provides full logical-to-physical mapping in less than
one clock cycle for a very high percentage of all bus cycles." The way it
works is like this:

1) A request for some memory is made by the 68020. This is intercepted by the
   68851 and compared against a 64-entry onchip translation cache. If a 
   match is found, and their are no extenuating protection modes set, then
   the translated address is put on the line.

   (They also note a neat feature here. It says that you can also specify
   a 3-bit 'task alias' for each address. This is intended for use by
   multi-tasking operating systems that can optimize the caching of up to
   8 tasks. Each task is assigned some unique 3-bit pattern which is used to
   identify addresses that it frequently uses. In effect, the 64-entry table
   can be evenly divvied up into 8 parts for 8 tasks.)

2) If the PMMU cannot find a match, then it must generate a translation on
   its own. It does this by first simultaneously aborting the logical bus
   cycle, signalling the 68020 to try again, and requesting mastership of the
   logical bus. It then performs the necessary translation lookup and passes
   it back to the 68020 when it is completed.

This is an extremely simplified view of what is going on, and I may have
horribly mangled it in trying to summarize. In addition, I have excluded all
mention of RPTs (Root Pointer Tables) and the format of the translation tables.
Feel free to make any corrections and/or additions where necessary. And
remember the disclaimer below...



-- 

Keith Rollin
Sales Technical Support
Apple Computer

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Stupid Quote: If god had meant man to fly, he would have given him plane tickets