🚀 go-pugleaf

To all Mac Hardware Gurus:

I am planning to build a hardware monitor for a Mac SE.  The monitor will
be constructed on an expansion card and will record all CPU instruction
fetches.  That is, it will record what instruction was fetched (including all
extension words) and at what address the instruction was fetched.

The monitor will have a small (approx. 16K) amount of static RAM which will
be used as a buffer. The monitor will also have its own serial port which will
be connected to a 2nd Mac's built-in serial port.  When the monitor's
static RAM buffer fills, the buffer's contents will be sent through the
monitor's on-board serial port to the 2nd Mac, using a standard serial
communications protocol.  The 2nd Mac will save the data it receives to disk
for later analysis.

And now the questions:

1)  When the static RAM buffer fills, the Mac being monitored must be stopped
    while the buffer's data is sent to the 2nd Mac.  The Mac must be
    stopped because the time needed to send 16K of data over a serial line
    is MUCH longer than the time it takes for the Mac to execute an
    instruction. (In fact, several thousand instuctions could be executed.)

    I plan to stop the Mac by asserting the BR pin (Bus Request), thus
    gaining control of the bus and preventing further instruction execution.
    When the serial tranfer is complete the monitor will release control
    of the bus and allow the Mac to resume instuction execution.
    Will such a strategy cause any problems?  In particular, what if the
    Mac is in the middle of a disk access when the monitor asserts the BR
    line?

2)  Could someone recommend a TTL-compatible chip that would handle the
    serial interface between the monitor and the 2nd Mac with a minimum of
    hassle?

Please E-Mail me your comments.  I appreciate any and all help.

Thanks.

  -- Jeff Kuskin

 EMAIL:    jskuskin@eleazar.Dartmouth.Edu

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