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Article #40149

Re: Yet Another Baseless Rumor

#40149
From: 0000-Alan Lovejoy(0000)
Date: Fri, 31 Mar 1989 02:40
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In article <4252fa64.a590@mag.engin.umich.edu> billkatt@caen.engin.umich.edu (billkatt) writes:
>In article <1377@taux01.UUCP> cyosta%taux01@nsc.COM ( Yossie Silverman ) writes:
>>I heard from a friend who knows people that the Mac IIxE is to be introduced
>>later this year.  It will feature a 33Mhz 68030, all the goodies in the
>>current new macs AND a RISC (88000 I would assume) QuickDraw processor.
>>I think this machine would count as a NeXT killer as it will have the
>>fastest (or at least very fast) graphics around.
>
>The Quickdraw processor is an AMD 27000, not an 88000, an 88000 costs MUCH
>too much to use as a co-processor.

What is an AMD 27000?  Do you mean an AMD 29000 RISC?   

You're quite right that the 88k is too expensive.  Given the price which
Apple pays for 68030's, a dual 68030 design is far more likely.  Or perhaps
even a 68030/68020 combo.  After all, the graphics coprocessor doesn't 
strictly need memory mangement.

Another possibility, for this time next year, is a 68040 based Mac.  For those
of you who have not heard, Motorola "announced" the 68040 this week.

Details:

General Sampling date: September 1989
Volume production date: 1Q90
Clock Speed:  25MHz initially, with 33MHz 3-4 months behind.
Performance:  13.5 @ 25MHz (Intel claims 10 MIPS @ 25 MHz for the 80486)
              2 MFLOPS SP (about 8x the 68882)
Transistor count: 1.2 million
Process: 1 micron HCMOS
On-Chip Caches: 4k instruction, 4k data
Functional Units: integer, floating point, mmu
Compatibility: full upward compatibility with 68030/68882
Price: unspecified
Other comments:  full internal Harvard architecture;
                 Motorola has not yet released all pertitent information,
		 including what programmer-visible architectural extensions
		 there may be or whether the '040 uses microcode or not;
		 based on the MIPS rating and the clock speed, it appears
		 that the '040's cycles-per-instruction ratio is just under 2,
		 at least when executing 68030-compatible code; that means 
		 that it is about equivalent to the current-generation
		 Fujitsu SPARC chip at the same clock speed; people who
		 might reasonably know have claimed that it also has RISC
		 style 3-operand register-register instructions, which
		 significantly increase performance if used;  we'll see.

[Source for most of this:  Electronic Engineering Times, March 27 '89]



Alan Lovejoy; alan@pdn; 813-530-2211; AT&T Paradyne: 8550 Ulmerton, Largo, FL.
Disclaimer: I do not speak for AT&T Paradyne.  They do not speak for me. 
__American Investment Deficiency Syndrome => No resistance to foreign invasion.
Motto: If nanomachines will be able to reconstruct you, YOU AREN'T DEAD YET.
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From: alan@rnms1.paradyne.com (0000-Alan Lovejoy(0000))
Newsgroups: comp.sys.mac
Subject: Re: Yet Another Baseless Rumor
Message-ID: <5884@pdn.paradyne.com>
Date: 31 Mar 89 02:40:27 GMT
References: <2464@tank.uchicago.edu> <1377@taux01.UUCP> <4252fa64.a590@mag.engin.umich.edu>
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