Article View: comp.sys.next.misc
Article #4369Re: 100 Mips Intel NeXT.
From: Matthew Dillon
Date: Mon, 14 Dec 1992 19:02
Date: Mon, 14 Dec 1992 19:02
54 lines
2651 bytes
2651 bytes
In article <1992Dec13.211119.22172@qb.rhein-main.de> vhs@rhein-main.de (Volker Herminghaus-Shirai) writes:
>In article <1992Dec11.180118.105908@lexmark.com> songer@lexmark.com (Christopher Songer)
>writes:
>> In article <1g7sq8INNggf@matt.ksu.ksu.edu> ovrskeek@matt.ksu.ksu.edu (I am the
>OVER-skeek!) writes:
>> >lschultz@pdx255 (Leonard Schultz) writes:
>> >
>> >
>> >The P5 (I hope this name sticks, pentium sucks!) may be superscalar,
>> >but it is not available yet, now is it? How many more transistors does
>> >it need to match the performance of a MIPS r4000? Which is already available!
>> >IF the P5 makes its (claimed) performance figures, it wouldn't be in the
>> >running for fastest chip if it was released tommorow!
>> >
>>
>> Still, Intel drives volumes high enough that while their chips may not be
>> the fastest per transistor, they are often the fastest per dollar.
>
>Price comparison:
> Intel 486, 50 MHz: >US$ 400.- in thousands
> Sparc "Tsunami", 50 MHz <US$ 80.- in thousands
>in addition, the Tsunami only needs another four support chips plus RAM
>for a complete system, while the 486 requires many more.
>
>> Economy of Scale is very important here.
>
>Yeah! That's why they should *not* stick with a monopolist like intel.
Not to mention the new integrated sparc's just now appearing (don't
have the article in front of me, so can't name names), but basically
these chips integrate about 20 IC's worth of functions into one pad
limited die, including a flexible dynamic ram controller, external bus
interface, and other stuff.
The sparc is not the fastest chip in the world, but compared to the
likes oof a 68040 or 80486 or (probably) the pentium, it beats ass. I
have no confidence in Intel, their chips have always been hacks and
always will be... fast hacks, perhaps, but still hacks.
-Matt
>
>--
>Volker Herminghaus-Shirai (vhs@qb.rhein-main.de)
>
>Looks good on the outside, but -
> intel inside
--
Matthew Dillon dillon@Overload.Berkeley.CA.US
1005 Apollo Way uunet.uu.net!overload!dillon
Incline Village, NV. 89451 ham: KC6LVW (no mail drop)
USA Sandel-Avery Engineering (702)831-8000
Technical Details
Message-ID:
<dillon.0std@overload.Berkeley.CA.US>Path:
arc1-ca.pugleaf.net!sparky!uunet!overload!dillonReferences:
<1992Dec11.180118.105908@lexmark.com> <1992Dec13.211119.22172@qb.rhein-main.de>Show Full Headers
Complete Article Headers
Path: arc1-ca.pugleaf.net!sparky!uunet!overload!dillon From: dillon@overload.Berkeley.CA.US (Matthew Dillon) Newsgroups: comp.sys.next.misc Subject: Re: 100 Mips Intel NeXT. Distribution: world Message-ID: <dillon.0std@overload.Berkeley.CA.US> References: <1992Dec11.180118.105908@lexmark.com> <1992Dec13.211119.22172@qb.rhein-main.de> Date: 14 Dec 92 11:02:27 PST Organization: Not an Organization Lines: 55