🚀 go-pugleaf

On Mon, 1 Apr 1996, Charles Bouldin wrote:

> MMA benchmarks are available on http://smc.vnet.net/mathbench.html. There
> is nothing that I've seen on P6; the fastest Intel chip represented is a
> 166 mhz Pentium. It loses, although not by much, to the 132 mhz 604.
> 
> I would suggest that the PPro advocates post to the MMA list! If you want
> to say that PPro is so much faster than the 604, please feel free to post
> results on the MMA site. I think it speaks *volumes* about the true
> availability of PPro machines that there is still no PPro result on the
> MMA test site! The results are mailed in by users, but so far no results.
> That is strange, since I would think that the power users who want P6
> machines would also include at least a few MMA users.

Well, I don't think that running Mathematica benchmarks would be of 
extremely high priority to those who own P6-200's, since I don't know too 
many people who purchase machines specifically to run Mathematica.  If I 
recall correctly, PPC604@133 boxes were made available last March (April?)
PPC604@150 boxes (PowerCC) were out last October, and P6@200 boxes were 
out in January96, (about same time as P5@166)  So I think that yes, P6@200 
boxes aren't as prevalent as P5@166's
 
> Ironically, this thread was originally titled, over a year ago(!)
> "PowerMac trounces Pentium with Mathematica". At the time, it was
> certainly true: PowerMacs were running MMA tests TWICE as fast as the best
> Pentium systems. The comment is no longer true; the P5 and P6 machines
> have gained a lot of ground. A tribute to Intel. Also, the thing that is
> never stated in the MMA tests is that MMA does so well on PMac because the
> kernel is compiled with the IBM RS/600-based xlc compiler! How's that for
> truth in advocacy?

Wow! truth in advocay indeed.  I wasn't aware of this.

> > (personal side note. from looking at all those numbers above, I have come 
> > to the conclusion that the PPC604 is approximately 10% faster at the same
> > clock speed than Pentium, given roughly equivalent configurations, i.e. 
> > same L2 cache size.  However, Pentiums are currently available at a slightly 
> > faster clock speed. 
> 
> I would quibble over the 10%...it's more like 20%, at least. This is
> pretty well settled...the debate is over 604/604e vs P6.

okay, whatever.  As SPEC showed, in floating point intensive applications,
the PPC604 runs about 20+ % faster, at the same clock rate (damn, I'm 
begining to sound like those who chant same clock rate, same clock rate)
I would think that Mathematica, would probably be heavily laden with 
floating point operations.  However, as I've said, doing mainly integer 
operations, the difference probably ought to be in the 10% range. 
Lastly, as I've also pointed out, Pentiums are available at higher clock 
rates than PPC604's.

> >Incidently, PPC604's have 3.6 million transistors, and
> > Pentiums have 3.3 million, so the performace per transistor-MHz for the 
> > two chips are very very roughly, the same. However, Intel appears to have
> > an advantage at this time, due to difference in process technology. Intel's
> > 133, 150 and 166 Mhz Pentiums are all fabbed on Intel's .35 micron process
> > technology, and IBM's PPC604 100, 120 and 133 MHz [the 150 Mhz process 
> > technology is under dispute, no reputable source for clarification] are
> > all fabbed on the .5 micron process. Bottom line is that the Pentium die
> > is 90 mm^2, and the PPC604 die is 196 mm^2 and so Intel could get 2 
> > pentiums out of the same piece of silicon for every 604 that IBM could
> > make.)
> 
> Maybe. You forgot YIELD. Nobody knows the relative yields on 604 vs P5.
> Conventional wisdom is that yields are supposed to be higher on RISC
> chips?

"RISC" is an architectural design concept. it could be implemented 
independent of process technology.  If I had Bill Gate's and Howard 
Hugh's money and insanity, I could build a mechnical "RISC" machine (the 
Babbage thing)  I don't know where the conventional wisdom you've cited 
comes from.  I would most certainly have to say that it's not true. 

> I am no process engineer, so perhaps someone who is can provide some real
> information. We sure aren't gonna find out from the companies...it's
> information that they don't reveal. The only thing that I think can be
> said fairly safely is that P6 yields are probably a LOT lower than P5 or
> 604...it can't be easy to get that huge full speed cache working on every
> chip.

I don't know about "a LOT lower". Caches in general are easier to fabricate 
and test than a chip full of random logic.  Yield might even be higher than 
an equivalent sized chip used to build a CPU. (I'm no cache designer, but 
from the looks of it, you probably wouldn't need all the levels of 
routing and interconnects that you would need on a cpu, so you can 
*probably* get away with less masking layers in the fabrication step. 
simpler process==higher yield.)  So you can make fewer P6's than P5's off 
of the same line?  yes, the dies are physically bigger, so you get less 
chips.  "a LOT lower" due to process faults? no, I wouldn't believe so.