🚀 go-pugleaf

In article <18471@autodesk.COM> marc@autodesk.com writes:
>
>In article 51917@seismo.CSS.GOV, dsc@seismo.CSS.GOV (taste is the enemy 
>
>>Model	    SPECint92	SPECfp92	MIPS	MFLOPS	Cache*	Contexts
>>-----	    ---------	--------	----	------	------	--------
>>IPX	    21.8	21.5		28.5	4.2	64	8
>>2	    21.8	22.8		28.5	4.2	64	16
>>Classic    26.4	21.0		59.1	4.6	6	64
>>LX	    26.4	21.0		59.1	4.6	6	64
>>
>>* in KBs - cache is unified unless marked as data/instruction.
>
>Take careful note of the cache size on the Classic/LX.  One thing that 
>has been become obvious to us here is that the IPX and SS2 perform
>significantly better (in some case 2 or 3 times) on large programs with
>poor cache locality.  Benchmarks don't always tell the whole story...


 I suppose you meant 'good cache locality' - because on programs that
 have 'poor cache locality' a.k.a cache thrashers - the LX/Classic
 will perform better than the IPX and SS2 - for the simple reason that
 the memory access latency is far better - (about 7-9 cycles vs 20).

 I have seen a number of cases where This teeny machines outperform 
 a number of bigger machines when the programs are memory bound.

 renu raman
-- 
--------------------------------
   Renukanthan Raman				Internet:renu.raman@Eng.Sun.COM
   M/S 16-11, 2500 Garcia Avenue,               Tel :415-336-1813
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