Article View: comp.sys.sun.hardware
Article #3048Re: 3-chip 30-pin parity SIMM's in Sparc 1, 1+ and 2 machines
From: George Robbins
Date: Mon, 01 Jun 1998 00:00
Date: Mon, 01 Jun 1998 00:00
45 lines
2825 bytes
2825 bytes
In article <Pine.GSO.3.96.980530071603.697A-100000@lios.apana.org.au>, Craig Dewick wrote: > >I've received a batch of 3-chip 30-pin parity SIMM's which I'm going to use >to build up a couple of sun-4c machines to 64 meg of RAM (they currently >have no RAM fitted). The SIMM's were sold to me as suitable for sun-4c >machines by a regular advertiser in the newsgroups. > >I've noticed problems with these SIMM's. They pass the POST RAM test fine >(usually), but when starting the kernel it fails with a watchdog reset. >I've tried swapping banks around, swapping entire banks out of the >machine, etc. all with mostly the same result. > >Sometimes the machines will boot, but fail soon after. Sounds like it could be a refresh problem. The x4 devices probably have different refresh requirements. >I've noticed that the RAM chips (marked as made by Mitsubishi) are not the >same speeds, which seems odd. The two 4-bit devices are 70 ns, while the >single-bit device is 60 ns. I don't see this as being a problem in itself, >since I'm suspecting the capacitive loading resulting from the SIMM's being >3-chip instead of 9-chip is what's upsetting the DRAM controllers. > >3-chip SIMM's have traditionally been seen, afiak, as a bad idea for early >Sparcstations. A "your milage may vary" issue... >I did try swapping out all the 3-chip SIMM's for some 9-chip ones I have >spare from another system, and they worked without a hitch, so perhaps the >old adage has come out of hiding to show it's still applicable? > >What are your opinions about this? I don't think the supplier of the SIMM's >will object to them being returned if there is a genuine problem since I'm a >regular customer. 8-) Usually it's adequte to say that they didn't work in your application and trade for 9-chip ones. It can be more of a battle if your supplier had to special order or doesn't have 9-chip versions to exchange. -- George Robbins - now working for work: grr@netaxs.com Net Access - seemed like the best uucp: ...!uunet!netaxs.com!grr way to help improve service... play: grr@tharsis.com
Technical Details
Message-ID:
<slrn6n5d26.iol.grr@shandakor.tharsis.com>Path:
arc1-ca.pugleaf.net!unknown!not-for-mailReferences:
<Pine.GSO.3.96.980530071603.697A-100000@lios.apana.org.au>Show Full Headers
Complete Article Headers
X-Google-Language: ENGLISH,ASCII-7-bit X-Google-Thread: f4671,495e04127a63dcd0 X-Google-Attributes: gidf4671,public X-Google-Thread: f88e1,495e04127a63dcd0 X-Google-Attributes: gidf88e1,public X-Google-Thread: 10d053,495e04127a63dcd0 X-Google-Attributes: gid10d053,public From: grr@shandakor.tharsis.com (George Robbins) Subject: Re: 3-chip 30-pin parity SIMM's in Sparc 1, 1+ and 2 machines Date: 1998/06/01 Message-ID: <slrn6n5d26.iol.grr@shandakor.tharsis.com> X-Deja-AN: 358451470 References: <Pine.GSO.3.96.980530071603.697A-100000@lios.apana.org.au> Organization: George's Pet Unix System Newsgroups: comp.sys.sun.hardware,aus.computers.sun,alt.sys.sun