Article View: comp.sys.sun
Article #9956Re: Fujitsu SPARC chip
From: Doug Ward
Date: Fri, 30 Dec 1988 17:21
Date: Fri, 30 Dec 1988 17:21
19 lines
1400 bytes
1400 bytes
Boy, I hate it when articles get the facts twisted up like that! The Fujitsu chip is not a 64-bit superset of the SPARC architecture. It is a SPARC chip (all the same instructions and registers), with 64 bit data and instruction pathways. The Scalable Processor Architecture for RISC Computers (SPARC) very carefully did *not* specify any details of the interface between the inside (instruction set, registers) and the outside (memory access, cache, mmu). One of the things that makes it "scalable" is that the "Harvard Architecture" is one of the things you can invest space and money in to make a high speed implementation. The Electronics article makes it sound like Fujitsu is somehow breaking away from SPARC. They are in fact adhering to the architecture fully. The Sparc-H series will be code compatible with all the other SPARC implementations. Only the hardware is different. -daw
Technical Details
Message-ID:
<8812201839.AA08263@fedora.sun.com>Path:
arc1-ca.pugleaf.net!utzoo!utgpu!watmath!clyde!att!osu-cis!tut.cis.ohio-state.edu!mailrus!nrl-cmf!ukma!husc6!rice!sun-spots-requestShow Full Headers
Complete Article Headers
Path: arc1-ca.pugleaf.net!utzoo!utgpu!watmath!clyde!att!osu-cis!tut.cis.ohio-state.edu!mailrus!nrl-cmf!ukma!husc6!rice!sun-spots-request From: daw@sun.com (Doug Ward) Newsgroups: comp.sys.sun Subject: Re: Fujitsu SPARC chip Message-ID: <8812201839.AA08263@fedora.sun.com> Date: 30 Dec 88 17:21:30 GMT Sender: usenet@rice.edu Organization: Sun-Spots Lines: 19 Approved: Sun-Spots@rice.edu Original-Date: Tue, 20 Dec 88 10:39:27 PST X-Sun-Spots-Digest: Volume 7, Issue 82, message 1 of 18