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CALL FOR PAPERS: IEEE Workshop on FPGAs for Custom Computing Machines

   April 5-7, 1993    The Inn at Napa Valley, Napa, California

PURPOSE:
To bring together researchers interested in the use of Field
Programmable Gate Arrays as computing elements to present recent work.
While papers of a theoretical nature are welcomed, it is anticipated
that this workshop will focus primarily on the current opportunities
and problems in this new and evolving technology for computing.  A
proceedings will be published by the IEEE Computer Society.

SHORT PAPERS OR ABSTRACTS (10 pages) SHOULD BE SUBMITTED BEFORE
JANUARY 9, 1993 TO ONE OF THE TWO CONFERENCE CO-CHAIRS.

This workshop is sponsored by the IEEE Computer Society and the TC
on Computer Architecture.

CoChairs:    Ken Pocek (west coast)    Duncan Buell (east coast)
             Intel                     Supercomputing Research Center
             Mailstop SC1-03           17100 Science Drive
             3065 Bowers Avenue        Bowie, Maryland 20715
             Santa Clara, CA  95052    301-805-7372                      
             408-765-2363              301-805-7602 (fax)                      
             408-765-2949 (fax)        duncan@super.org            
             kpocek@sc.intel.com

ORGANIZING COMMITTEE:
Lynn Abbott , VPI           Fred Furtek, Concurrent Logic  
Jeffrey Arnold, SRC         Leon Maissel, IBM  
Peter Athanas, VPI          Richard Newton, U Cal-Berkeley
Apostolos Dollas, Duke U    Jonathan Rose, U Toronto  
Tom Kean, Algotronix        Steve Trimberger, Xilinx 
Wally Kleinfelder, SRC      David Van den Bout, N. Carolina State U 

SOLICITATION::
Papers are solicited on all aspects of the use or applications of
(usually multiple) FPGAs as (usually reconfigurable) computing
elements in attached or special purpose processors or coprocessors,
especially including but not limited to
*** coprocessor boards for augmenting the instruction set of
    general purpose computers;
*** attached processors for specific purposes (e.g. signal
    processing) or general purposes;
*** languages for programming FPGA-based computers;
*** tools and environments for programming FPGA-based computers;
*** application domains suitable for FPGA-based computers;
*** architecture emulation using FPGA-based computers.

[An attempt will also be made to have general panel discussions by the
major software and hardware vendors on what to expect in the near
future in capability for FPGA-based systems.]

Individuals wishing to be put on an email list for further information
about this workshop should send email with name, regular mail address,
and email address to Duncan Buell.