🚀 go-pugleaf

"patrick" == Patrick F. McGehearty <patrick@convex.COM> writes:
JET == jet@boxer.nas.nasa.gov (J. Eric Townsend) 

JET>Blinking lights.  Lots and lots of blinking lights....

patrick> have suggestions for specific hardware events that might be
patrick> connected to blinking lights on a massively parallel shared
patrick> memory super?

I sorta like the ipsc/delta/sigma solution:
 - one for cpu active
 - <something> for communication
 - one for node failure

I've seen more than one person debug their code on the ipsc/860 by
sitting in front of the cabinet and watching the led's.. "See, it hung
in computation after the third massive data shuffle..."

I'd also like to have some sort of cray-like debugging panel where I
could get information like:
 - register (including control registers) information for a specific
node
 - examine arbitrary memory addresses (yeah, right :-)
 
While we're at it, how about a led for each transistor in each chip?
It'd only take what, ~1mil led's for a i860?  Let's see, that's a
1000x1000 pixel grid, and at 400dpi (using Kodak(?)'s new 400dpi lcd),
that's about 2.5x2.5in.

With a 3'x6' panel, we're looking at roughly 15x30 such lcds, giving
us the ability to examine the cpus of 450 nodes of a reasonably large
sigma... Another door's worth would probably give us all the support
chips.  The real problem comes with ram: 1MB of 9-bit parity ram would
take a cell 7"x7" to show each bit... Oh well, maybe just light up a
point based on the parity bit to show bad memory?

This is getting out of hand, I suspect...


--
             J. Eric Townsend --  jet@nas.nasa.gov -- 415.604.4311
               '92 R100R, DoD# 0378, BMWOA, AMA, ACLU, EFF, CPSR
                                "HotHead Rules!"