🚀 go-pugleaf

        This goes to people on the net who has experience designing
dynamic RAM for the Transputer T800.

        I am working in a 2 Mbytes DRAM board which was designed to expand
the memory of a T800. This T800 is the master of an array of 16 T800 inter-
connected by two C004's. All T800's including the master reside in a board
that is connected to a slot in a 386 PC bus. The system communicates with the
PC through a C012 link adaptor mapped into the PC IO space. It was tested and
is working great.

        The DRAM board plugs into the array board through a connector, which
means that the two boards are physically in parallel to each other. In the
phase of debugging the design, I connected the Memconfig pin to MD14 where
I get 300ns cycle time for an 80ns DRAM. All DRAM timings were checked and
are all right.

        To check if the memory worked or not, I used the Inmos utilities
CHECK and MTEST. The result I get is nothing but the T800 internal memory.
Conclusion: the DRAM board doesn't work. I then used a scope to check the
strobe signals when I realized that an incredible level of noise is present
in all lines, including the power line. Friends I talked to informed that DRAMs
are very sensitive to noise. Well, all sockets in the board carry a .1uF
decoupling cap and all sorts of ideas I had to filter these noise were tried.

        My question to the netters:

        Is there anybody out there who experienced a similar problem and can
give me a light on the subject ? I will appreciate your help. I have access
to TDS2 and Logical Systems C with an Inmos B002 which is also connected to
the 386 I am using. Please answer direct to my email. I'll be glad to report
the developments to any one in the net who is interested in the subject.

        Thanks,    Marco.

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Marco A. Figueiredo
mfigueiredo@loyvax1.bitnet
Loyola College - Baltimore, Maryland, USA
Computer Science Department
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