using wait-states on a T8 or a T4

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#2425

From: Andrew Stewart
Date: Fri, 20 Jan 1989 11:06

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Does anyone have experience of using the MEMWAIT pin on a T8 or a T4 to
stretch the memory cycle? I have a circuit that doesn't appear to work,
despite following the timings laid down in the T800 product description. As
far as I can see, the memory cycle is ending *despite* MEMWAIT being held
low; I'm taking memwait low at the same point in the cycle as MS3 goes low,
and I'm using the internal memory configuration available on AD7. (The
slowest multiplexed DRAM time).

On the logic analyser, I get this (amid lots of other rubbish):

              <-    ~200ns    ->
              
MS0:    ------|________________|-------------
MS2:    -----------|___________|-------------
MS3:    -------------|_________|-------------
MEMWAIT:-------------|_________|-------------

which looks quite odd.

Anyone got any suggestions?

Andrew Stewart
--------------------
Andrew Stewart, Interactive Systems Design Group, University of Hull, Hull, UK
ARPA:   andrew%hu-isd.uucp@ukc.ac.uk OR andrew@cs.hull.ac.uk

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From: andrew@isdg.cs.hull.ac.uk (Andrew Stewart)
Newsgroups: comp.sys.transputer
Subject: using wait-states on a T8 or a T4
Message-ID: <2555.8901201106@gandalf.isdg.cs.hull.ac.uk>
Date: 20 Jan 89 11:06:22 GMT
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