🚀 go-pugleaf

One of the problems with porting a non-transputer C compiler to the
transputer is the transputer's evaluation stack.  One can simulate
registers using on-chip RAM, in which case the evaluation stack is
barely used and all of the loads and stores to and from RAM slow down
expression evaluation a lot.  If, on the other hand, one uses the
stack for expression evaluation, then one has to be very careful about
stack overflow (the stack is only three elements deep).  A peephole
optimiser would clean up a lot of the loads and stores associated with
the first approach, but the second approach would need a quite
different code generation algorithm.

Would someone who has written for the transputer or ported any form of
compiler to the transputer please comment on the feasability or
difficulty of these two approaches, or tell us what transputer
compilers really do.

-- 
Hubert Matthews      ...helping make the world a quote-free zone...
hjm@cernvax.cern.ch   hjm@vxomeg.decnet.cern.ch    ...!mcvax!cernvax!hjm