Buffering Transputer Links

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#372

From: David Laurenson
Date: Thu, 09 Nov 1989 16:16

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I am trying to build a transputer link analyser that passively
monitors the communications link between two transputers, and produces
a high level (hopefully) form of debugging/performance monitoring.  I
am currently trying to find a suitable differential driver/receiver
pair that I can use that will not introduce more than 3nS skew.

I am currently looking at the uA9637AC and uA9638C pair, but I am
unsure of their skew tolerance.   Has anyone already buffered the
links successfully, and if so what chips did you use?

    David I. Laurenson                |
    Department of Computer Science    |
    Edinburgh University King's Bldgs |  JANET   dil@uk.ac.ed.lfcs
    Mayfield Road, EDINBURGH  U.K.    |

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Path: arc1-ca.pugleaf.net!utzoo!attcan!utgpu!jarvis.csri.toronto.edu!rutgers!usc!cs.utexas.edu!uunet!mcsun!ukc!edcastle!lfcs!dil
From: dil@lfcs.ed.ac.uk (David Laurenson)
Newsgroups: comp.sys.transputer
Subject: Buffering Transputer Links
Message-ID: <1049@castle.ed.ac.uk>
Date: 9 Nov 89 16:16:43 GMT
Reply-To: dil@lfcs.ed.ac.uk (David Laurenson)
Organization: Laboratory for the Foundations of Computer Science, Edinburgh U
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