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Article View: comp.sys.transputer
Article #434

Re: H1

#434
From: Lindsay Patten
Date: Thu, 30 Nov 1989 00:11
18 lines
1295 bytes
In article <[A.ISI.EDU]29-Nov-89.11:26:54.ENGLE>, ENGLE@A.ISI.EDU writes:
 
> Given virtual routing, I think you have to ask whether more than two 
> links are necessary.  The effect will be that we can all toss out our
> code that routes between intermediate processors and let the chip 
> handle it.

> Steven W. Engle

But two links limits you to a linear array (or loop I guess) which places
a definate limitation on the number of processors that you can use for most
applications.  It makes fault tolerence difficult.  It means I can only have
a one dimensional hypercube!!!

Lindsay Patten
Pattern Analysis & Machine Intelligence Group                   lindsay@watnext
Department of Systems Design Engineering           lindsay@watnext.waterloo.edu
University of Waterloo              {utai|decvax|uunet}!watmath!watnext!lindsay
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Message-ID: <12488@watcgl.waterloo.edu>
Path: arc1-ca.pugleaf.net!utzoo!utgpu!watserv1!watcgl!watnext!lindsay
References: <[A.ISI.EDU]29-Nov-89.11:26:54.ENGLE>

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Path: arc1-ca.pugleaf.net!utzoo!utgpu!watserv1!watcgl!watnext!lindsay
From: lindsay@watnext.Waterloo.EDU (Lindsay Patten)
Newsgroups: comp.sys.transputer
Subject: Re: H1
Message-ID: <12488@watcgl.waterloo.edu>
Date: 30 Nov 89 00:11:05 GMT
References: <[A.ISI.EDU]29-Nov-89.11:26:54.ENGLE>
Sender: daemon@watcgl.waterloo.edu
Reply-To: lindsay@watnext.Waterloo.EDU (Lindsay Patten)
Distribution: world
Organization: University of Waterloo
Lines: 18