Thread View: comp.sys.transputer
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Started by "A.ALLEN"
Thu, 21 Mar 1991 17:17
DSP and Transputers.
Author: "A.ALLEN"
Date: Thu, 21 Mar 1991 17:17
Date: Thu, 21 Mar 1991 17:17
44 lines
2447 bytes
2447 bytes
DSP and Transputers ------------------- At Aberdeen (Dept of Engineering) we do DSP, using transputers (TP) and 'hybrid' processors, so maybe I should add something to this discussion. One of our particular applications is the use of ultrasound to probe the textural properties of surfaces (roughnesses ~ 10 - 100 um). The signal processing consists of deconvolving pulse echoes from the transceiver response function. We have used a variety of deconvolution techniques, and have found that nonlinear, iterative methods (like Maximum Entropy) give superior results compared with simple inverse filtering. However, these methods are computationally demanding and so we have been investigating the use of TPs and DSP hardware. It is certainly true that naive application of TPs to DSP can produce unimpressive speedups (and, indeed, speed-downs). However, we have found that TPs *can* provide benefits in the areas of data parallelism, algorithmic parallelism, and in the simultaneous exploration of alternative solutions to a problem. There are also powerful chips tuned to DSP tasks, and we decided we wanted the best of both worlds, so we designed ourselves a hybrid. (This was 1988/89, before one could go out and buy a DSP TRAM.) In order to assure the convergence and stability of our nonlinear deconvolution methods it is necessary to use floating point numbers, and to this end we designed and built a close-coupled TP/DSP processor consisting of a T8 and an AT&T DSP32C communicating through dual-port memory. Yes, I know the Zoran chip is faster, but at the time the AT&T chip was the only one we could get our hands on. This DSP node is integrated into our small TP array (6 T8s + a few T4s), and performs well as an FFT (etc.) coprocessor. We feel that our experiments have confirmed the usefulness of DSP hardware integrated into a parallel computing environment. Dr Alastair R Allen Dept of Engineering University of Aberdeen UK. a.allen@uk.ac.abdn
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