Thread View: comp.sys.transputer
3 messages
3 total messages
Started by Peter Clare
Tue, 20 Mar 1990 14:50
More undocumented instructions
Author: Peter Clare
Date: Tue, 20 Mar 1990 14:50
Date: Tue, 20 Mar 1990 14:50
54 lines
2141 bytes
2141 bytes
Further to the recent discussion on undocumented transputer instructions,
here are some more instructions that I am aware of (in addition to the
"testhardchan" instruction mentioned previously). I know little more
about these instructions other than their operation codes and their
mnemonics:
Operation code (hex) Mnemonic
-------------------- --------
23 testlds
24 testlde
25 testldd
26 teststs
27 testste
28 teststd
2D testhardchan
80 fpsttest
85 fpldtest
A7 fpentry3
A9 fpentry2
>From the mnemonics, one can guess at what some of these instructions might
do. In particular, the two extra fpentry instructions look interesting.
If they work like the normal fpentry instruction then they could lead to
a whole load of extra floating point instructions. If you are familiar
with the transputer instruction set then you will see that these extra
instructions fill in some of the "gaps" between the documented instructions.
Here are some questions. Can anyone on the transputer grapevine provide
any answers?
1) Are there any more undocumented instructions?
2) What do these instructions do? How do they affect registers and
what are the cycle times?
3) Are any of these instructions of any real use other than for testing
purposes?
4) Which instructions are supported on which types of transputer?
===============================================================================
Peter Clare
THORN EMI Central Research Laboratories
Dawley Road
Hayes
Middlesex
UB3 1HH
Tel: 01-848-6521
Fax: 01-848-6565
Eurokom: Peter Clare THORN EMI
email: clare@thorn-emi-crl.co.uk
===============================================================================
Re: More undocumented instructions
Author: Steven Ericsson Zenith
Date: Tue, 20 Mar 1990 23:12
Date: Tue, 20 Mar 1990 23:12
32 lines
1708 bytes
1708 bytes
In article <9003201450.AA01756@flay.thorn-emi-crl.co.uk>,
clare@tesun2.UUCP (Peter Clare) writes:
I know little more
about these instructions other than their operation codes and their
mnemonics:
Operation code (hex) Mnemonic
-------------------- --------
23 testlds
24 testlde
25 testldd
26 teststs
27 testste
28 teststd
...
2) What do these instructions do? How do they affect registers and
what are the cycle times?
You mean the load and store Status Register, E Register and D Register?
Nah ... you don't want to know :-) (tease!). Maybe you should ask an
INMOS FAE... maybe he doesn't know. Maybe you should read my book when
it comes out (how to put the fear of god in INMOS :-) Nah! just kidding
guys ... honest!)
--
. .
Steven Ericsson Zenith * email: zenith@cs.yale.edu
Department of Computer Science | voice: (203) 432 1278
Yale University 51 Prospect Street New Haven CT 06520 USA.
"All can know beauty as beauty only because there is ugliness"
Re: More undocumented instructions
Author: Malcolm Boffey
Date: Mon, 26 Mar 1990 17:38
Date: Mon, 26 Mar 1990 17:38
21 lines
1728 bytes
1728 bytes
This is in response to queries about undocumented instructions for loading and storing the D, E, S registers. In addition to the published registers :- A, B, C, I, W, queue pointers etc, there are a few (D, E) that are used to hold intermediate values in some of the instructions. As they are not saved during interrupts, there seems little use for them in low priority, and they can only be used safely at high priority if you know what instructions are able to corrupt them (which I don't). Anyway, it is easier to use another local variable. The status register (S) holds miscellaneous bits of state like the Error flag and the HaltOnError flag, for which there are already enough instructions to access and alter them. There are one or two other instructions that are used for testing, none of them terribly usefull or interesting. Also, it is more or less a certainty that they will be discontinued in future transputers, or at least change their function significantly. malc. Malcolm Boffey, Transputer Group, Inmos. | Inmos Ltd, UK: malc@inmos.co.uk | 1000 Aztec West, Almondsbury, US: malc@inmos.com | Brisol BS12 4SQ. UUCP: ...uunet!mcsun!ukc!inmos!malc | Tel. +44 454 616616 x522
Thread Navigation
This is a paginated view of messages in the thread with full content displayed inline.
Messages are displayed in chronological order, with the original post highlighted in green.
Use pagination controls to navigate through all messages in large threads.
Back to All Threads