Zenith 386/16 memory board question

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1 total messages Started by Shamus McBride Tue, 11 Aug 1992 21:39

#190

Author: Shamus McBride
Date: Tue, 11 Aug 1992 21:39

29 lines
1490 bytes

While running Turbo C++ my machine kept getting a memory parity error.
Memory diagnostics didn't find the error. I set a trap on the NMI
interrupt handler entry, then when the error occured again I checked
ports F4H, F5H, F6H, and F7H for errors (technical manual 15-14). F7
showed 11110111 which implies an error in Bank 3 of the 4th card (of 4
1Meg cards).

So my question is how are the banks laid out on the
386/16 memory card?

    +----------------------------------------+
    | [][][][][][][][][]  [][][][][][][][][] |
    |                                        |
    | [][][][][][][][][]  [][][][][][][][][] |
    |                                        |
    |                            +----------++
    +-IIIIIIIIIIIIII-IIIIIIIIIII-+

Drawn from memory. 4 banks, TL, TR, BL, BR.


Any suggestions on how to better isolate the offending chip.
I usually start swapping chips around, but it often takes
2 to 3 hours to find the bad(?) chip ;-(

--
Shamus Mc Bride           | tecslm1@sdc.boeing.com      
Boeing Computer Services  | tecslm1%sdc@atc.boeing.com
(206) 865-5047            | uw-beaver!bcsaic!sdc!tecslm1

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