🚀 go-pugleaf

In article <16014@haddock.ima.isc.com> karl@haddock.ima.isc.com (Karl Heuer) writes:
 > In article <E*er-q@cs.psu.edu> callahan@mordor.endor.cs.psu.edu (Paul B. Callahan) writes:
 > >If we assume that floating point arithmetic is done using a sign-magnitude
 > >representation [then truncate is probably easier than floor to implement].
 > 
 > But, given that most implementations use two's complement for integers, and
 > even for floating-point exponents, why *is* sign-magnitude the standard for
 > floating point significands?
 > 
There is a good reason to use two's complement for integers: on an add
ignore carry, this reason is much less compelling when doing floating-point
arithmetic, you can not simply ignore carry.  Note also that the exponent is
not strictly two's complement, but has the sign bit inverted.  The reason is
that compare logic is simplified.

Further, IEEE specifies four rounding modes, so using a two's complement
mantissa because of simple truncation is no good reason.  It is even
stronger: when doing a round to nearest IEEE specifies that if the
exact result is halfway two representable numbers, that number has to be
chosen that has a low order zero bit (*).  With a two's complement
mantissa a similar requirement might be posed, but it would look more
complex, and would be more complex in the logic.
--
(*)  See [I think; this is from memory] IEEE Computer, Vol. 14, Issue 1.
This describes draft 8.0 of the IEEE standard and has a number of
accompanying articles.  The current standard is based on draft 10.0.
There are some differences, but they are not shocking.  I do not have
a reference for that standard.
-- 
dik t. winter, cwi, amsterdam, nederland
dik@cwi.nl