🚀 go-pugleaf

Yos P. wrote:
> Hello,
> I'm using this makefile to compile a C++ project (using g++):
>
> CC = g++
> CFLAGS = -Wall
> OBJ = somefile.o somefile.o... somefile_in_another_dir.o...
> somefile_in_another_dir.o...
>
> all: test
>
> .cpp.o:
> 	$(CC) $(CFLAGS) -c $<
>
> test: $(OBJ)
> 	$(CC) $(CFLAGS) $^ -o $@
>
> clean:
> 	rm -f *.o *~ test
>
> depend:
> 	echo -e '\n' >> Makefile
> 	$(CC) -MM *.cpp >> Makefile
>
> .PHONY: all clean
>
> By now, all of my files were in the same directory, but since my
> project grew larger I've add some sub-directories.
> My questions are:
> 1. How do I config the depend to include dependencies from other
> directories.

In this case, you would wildcard in those directories also.

There are more sophisticated ways to generate dependencies that do not
modify the makefile and automatically regenerate when out of date (see
'info make').

>
> 2. I'll be happy if anyone could remind me the g++ flags for compiling
> when #include from other directories, and linking when involved .o
> files from multiple directories.

If each source file has a distinct name, then simply use 'vpath'
directive to add them to make's search path, and they will be found and
trigger your stated pattern rule for compilation.

vpath %.cpp dir1 dir2

Your dependency rules only need to give the prerequisite's filename
(excluding directory).

> 
> Thanks,
> Yos P.