Article View: csu.unix.linux
Article #208Re: Upgrades to a PII
From: walter
Date: Wed, 10 Nov 1999 00:00
Date: Wed, 10 Nov 1999 00:00
54 lines
3593 bytes
3593 bytes
Michael Dwyer <mdwyer@holly.colostate.edu> wrote: : Adam Carheden <carheden@holly.colostate.edu> wrote: : : What if I went with a nice K6-2 and the familiar Socket 7 interface. : : Has anyone tried K6-2? Are they any good? Are they supposed to be : : comprable to a PII or a PIII? : They are pretty good. They lack some of the floating-point power that : the Intel's have, but they are very decent chips. I checked out some hardware pages before buying my last processor. Tom's Hardware Page is one I remember, but I checked several. My conclussion was that the AMD chips lack quite a bit in the FPU, and although a lot cheaper, weren't worth it too me. I couldn't afford a PII/PIII at the time, so went with a Celeron 466 at a price comparable to the AMD chips and a lot cheaper than the PII/PIIIs. In most of the benchmarks the Celerons tracked the PIIs quite well. The Celeron has only 128KB of cache where a PII has 512KB. But the Celeron cache runs at the full bus? speed where the PII cache runs at half that speed. So under cache-intensive loads the PII wins. Under less-cache-intensive loads the Celeron wins as it's cache is faster. Be careful with socket 7 chips though. Some of the newer ones require a "Super Socket 7" or something like that. The socket is the same size, but has some added functionality, as well as clock speeds and multipliers and voltages that a lot of old socket 7 boards don't support. So if you go AMD be sure that your MB can support it. : I should note that : the Intel Celery Processors are being sold in a socket-7-ish package : again. I guess it makes them cheaper than the slot package. : There is some acronym for this, I'm sure, but I don't recall. PPGA - stands for SomethingThatStartsWithaP Pin Grid Array. They also refer to these as socket 370 chips. This what I ended up getting. At the time I was shopping the reports I read were that Intel was expected to change the PIII from the Slot 1 architecture to a socket architecture by Fall 99. (This is coming up soon, right?). Anyway, the stuff I read made it sound like the Slot 1 architecture was one it's way out, and that Intel was going to the socket 370 and some new socket in the near future, eventually coming out with 100 MHZ front side bus Celerons (or some other chip that fit socket 370). So I went with the socket 370 Celeron and made sure to get a MB that supported 100 MHZ FSB. I've yet to see these new architecture PIIIs, so maybe I bought into some dead-end technology? I dunno. I have a buddy that has a MB with both socket 370 and Slot 1 on the same board. Until Intel comes out with it's new package for the PIII that may be the way to go there. Good Day, --bjw -- Brian J Walter | walter@lamar.colostate.edu Chem Graduate Student | CSU 36 - NM 22 Colorado State Univ | Next Up: Time to ground the Falcons Fort Collins, CO | Go WYO! Go Utes! Beat BYU!
Technical Details
Message-ID:
<80c7pe$hghg@lamar.ColoState.EDU>Path:
arc1-ca.pugleaf.net!unknown!not-for-mailReferences:
<38276306.BFB29600@holly.colostate.edu> <382764AD.16FC019@holly.colostate.edu> <80aa79$1ltm@yuma.ACNS.ColoState.EDU>Show Full Headers
Complete Article Headers
X-Google-Language: ENGLISH,ASCII-7-bit
X-Google-Thread: 1159f7,9e21cbcab977c412
X-Google-Attributes: gid1159f7,public
From: walter@lamar.colostate.edu
Subject: Re: Upgrades to a PII
Date: 1999/11/10
Message-ID: <80c7pe$hghg@lamar.ColoState.EDU>
X-Deja-AN: 546963218
Sender: walter@lamar.ColoState.EDU
References: <38276306.BFB29600@holly.colostate.edu> <382764AD.16FC019@holly.colostate.edu> <80aa79$1ltm@yuma.ACNS.ColoState.EDU>
Organization: Colorado State University, Fort Collins, CO 80523
User-Agent: tin/pre-1.4-19990517 ("Psychonaut") (UNIX) (AIX/4-3)
Newsgroups: csu.unix.linux