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Article #69049Re: Caught by cache?
From: Marcus Bainbridge
Date: Sun, 14 Apr 1996 00:00
Date: Sun, 14 Apr 1996 00:00
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John Naismith <John@naismith.demon.co.uk> wrote: >No they're not. Whoever told you that this was the cache didn't know what they >were talking about. They are the cache *controllers*. Crap. The cache controller is built into the PCIset. Write-back is a function of the cache controller, but it doesn't take two chips to implement it. It does, however, take two SRAM chips to make 64-bit cache. Or QFP mouldings in this case... -- Marcus Bainbridge marcus@mwb.u-net.com - http://www.geocities.com/SunsetStrip/3429
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X-Google-Language: ENGLISH,ASCII-7-bit X-Google-Thread: 1036bc,7858595a79b6a65d,start X-Google-Attributes: gid1036bc,public From: Marcus Bainbridge <marcus@mwb.u-net.com> Subject: Re: Caught by cache? Date: 1996/04/14 Message-ID: <61gucDAfVUcxEw5c@mwb.u-net.com> X-Deja-AN: 147450515 distribution: world references: <415183800wnr@draycot.demon.co.uk> organization: Sweeping Generalisations Inc. mime-version: 1.0 newsgroups: demon.tech.pc