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Article #71687Re: Cache Ram chips..Help please
From: Rajesh Varia
Date: Wed, 15 Nov 1995 00:00
Date: Wed, 15 Nov 1995 00:00
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1174 bytes
In article <DI38sp.4s@sphere.demon.co.uk>
ipaton@sphere.demon.co.uk "Iain Paton" writes:
> Rajesh Varia (raj@c4rv.demon.co.uk) wrote:
>
> : The extra chip is for TAG socket which is the parity bit of cache.
>
> That's the second time I've seen that misconception.
> Doesn't anyone know how cache ram is organised ?
>
> I
>
> Clue: The TAG chip has nothing to do with parity.
>
Ignore my comment about TAG socket being for parity. If anybody wants
to know what its really for, I'll try and did out my paper on different
caching techniques used by different manufactures.
--
Rajesh Varia raj@c4rv.demon.co.uk
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X-Google-Language: ENGLISH,ASCII-7-bit X-Google-Thread: 1036bc,6a4e62b1410e46e2 X-Google-Attributes: gid1036bc,public From: Rajesh Varia <raj@c4rv.demon.co.uk> Subject: Re: Cache Ram chips..Help please Date: 1995/11/15 Message-ID: <816473814snz@c4rv.demon.co.uk> X-Deja-AN: 119444145 x-nntp-posting-host: c4rv.demon.co.uk references: <b5d9XBAdfOqwEwob@ch-w.demon.co.uk> <816384669snz@c4rv.demon.co.uk> <DI38sp.4s@sphere.demon.co.uk> organization: home reply-to: raj@c4rv.demon.co.uk newsgroups: demon.tech.pc