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Article #53684Re: SIMM memory
From: Takehiko Noro
Date: Wed, 21 Aug 1996 00:00
Date: Wed, 21 Aug 1996 00:00
24 lines
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1559 bytes
้ๅใงใใ <Dw9xBD.4yF@rdsun26.roland.co.jp>ใฎ่จไบใซใใใฆ komuro@roland.co.jpใใใฏๆธใใพใใใ > >> C650(Q650)ใซใฏใใกใขใชใคใณใฟใผใชใผใใจใใๆฉ่ฝใใใใพใใ > > ใใใฃ๏ผใใใชใใงใใใ๏ผๅฐใชใใจใใฏใขใใฉ650ใซใฏ๏ผใใใฏ > ใชใใใจ็ฉใฎๆฌใง่ชญใใ ใใใชๆฐใใใพใใใปใปใใฌใปใ ใฃใใฎใใช๏ผ > ใฉใชใใใ่ฃใๅใใใฆใใใฆใผใถใผใฎๆนใใใใฃใใใใพใใ๏ผ --SIMM Stack Copyright Apple Computer, Inc. 1995 ใใๅผ็จ The Centris/Quadra 650 uses "memory interleaving" which occurs when like SIMM pairs are used (for example: two 8MB SIMMs). This allows the memory subsystem to perform certain operations faster. Basically, it allows the memory subsystem to write to the same memory address in different banks of memory before incrementing the address. Depending on how memory intensive the application, this can improve performance 5 to 10%. -- Takehiko Noro (้ๅ ไธๅฝฆ) / Kawaguchi-Shi, Saitama-Ken, JAPAN t-noro@st.rim.or.jp
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X-Google-Language: Japanese,JIS X-Google-Thread: f514d,15e13fc6d535c1fd X-Google-Attributes: gidf514d,public From: t-noro@st.rim.or.jp (Takehiko Noro) Subject: Re: SIMM memory Date: 1996/08/21 Message-ID: <t-noro-2108961903460001@st.rim.or.jp> X-Deja-AN: 176840123 references: <k-ichi-1508962250510001@ppp105.hf.rim.or.jp> <t-noro-1608961733590001@st.rim.or.jp> <Dw9xBD.4yF@rdsun26.roland.co.jp> content-type: text/plain; charset=iso-2022-jp organization: RIMNET mime-version: 1.0 newsgroups: fj.sys.mac