🚀 go-pugleaf

I am having a bit of a problem getting a working GCC 1.36 on our
Sequent Balance 8000 and 21000 machines.  The following seems to be
the only thing (currently) standing in the way of getting it going:

$ make
	cc -c -g  -I. -I. -I./config reload1.c
"reload1.c", line 2249: compiler error: out of tree space; simplify expression
*** Error code 1
Make: .  Stop.
$

I've examined the output of the preprocessor and don't know how to
simplify this expression; even after taking out lots of extraneous
parens and whitespace so I could see the logic more clearly I still
have insufficient knowledge of the compiler internals to make sensible
changes.  Some help (a reload1.s?) would be appreciated so I can get
this going in time for classes starting in about ten days.

The same error happened on both the 8000 and its big brother, the 21000.
The OS is DYNIX 3.0.4.  The expression in question, after macro
expansion, is:

      if (!    (( reload_mode) == DFmode						    ? ((( ((reload_reg_rtx[r])->fld[0].rtint)) & 1) == 0					       && ((target_flags & 1) ? ( ((reload_reg_rtx[r])->fld[0].rtint)) < 16 : ( ((reload_reg_rtx[r])->fld[0].rtint)) < 8))		   : ( reload_mode) == DImode ? (( ((reload_reg_rtx[r])->fld[0].rtint)) & 1) == 0 && ( ((reload_reg_rtx[r])->fld[0].rtint)) < 8	   : 1)
	  || (reload_in[r] != 0
	      && !    (( 				       		((reload_in[r])->mode)) == DFmode						    ? ((( ((reload_reg_rtx[r])->fld[0].rtint)) & 1) == 0					       && ((target_flags & 1) ? ( ((reload_reg_rtx[r])->fld[0].rtint)) < 16 : ( ((reload_reg_rtx[r])->fld[0].rtint)) < 8))		   : (
				       		((reload_in[r])->mode)) == DImode ? (( ((reload_reg_rtx[r])->fld[0].rtint)) & 1) == 0 && ( ((reload_reg_rtx[r])->fld[0].rtint)) < 8	   : 1))
	  || (reload_out[r] != 0
	      && !    (( 				       		((reload_out[r])->mode)) == DFmode						    ? ((( ((reload_reg_rtx[r])->fld[0].rtint)) & 1) == 0					       && ((target_flags & 1) ? ( ((reload_reg_rtx[r])->fld[0].rtint)) < 16 : ( ((reload_reg_rtx[r])->fld[0].rtint)) < 8))		   : (
				       		((reload_out[r])->mode)) == DImode ? (( ((reload_reg_rtx[r])->fld[0].rtint)) & 1) == 0 && ( ((reload_reg_rtx[r])->fld[0].rtint)) < 8	   : 1)))

Dave
-- 
   (setq mail '("tale@cs.rpi.edu" "tale@ai.mit.edu" "tale@rpitsmts.bitnet"))