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Article #41395

GNU make and $$@

#41395
From: David McKay
Date: Tue, 26 Mar 1996 00:00
45 lines
1779 bytes
I have a whole bunch of sunos makefiles with the following construct in them:


EXPORTS=$(INCDIR)/file1.h \
        $(LIBDIR)/somelib.a 
# Vast list of headers and libraries


# Rule to install the build components to the common include and lib area
install : $(EXPORTS)

$(EXPORTS) : $$(@F)
	rm -f $@
	cp -p $(@F) $@

somelib.a : obj.o 


The $(@F) macro simply takes the filename part of the target and discards the
directory part.

The purpose of this strange macro is copy the files from where they are built 
to a common area where they can be used from. I got fed up having a rule for 
each file, and so came up with this. (This even works under microsoft make!)

*HOWEVER* I am now trying to get this to work under gnu make (for linux)

It says in the documentation that this construct can be replaced with a 
static pattern rule, so I tried

$(EXPORTS) : %: $(notdir $@)


This doesn't seem to work, as it doesn't do the rule for somelib.a

I am obviously doing something very dim here, but I can't for the life of 
me figure out a way round this, apart from writing a rule for each file, 
which makes the linux makefile extremely tedious to say the least. Can some 
gnu make Guru help me out here??????


-- 
Dave McKay 
Software Engineer SGS-THOMSON Microelectronics
Email: djm@bristol.st.com Phone: 01454 611 355
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From: djm@morticia.inmos.co.uk (David McKay)
Subject: GNU make and $$@
Date: 1996/03/26
Message-ID: <4j8gnq$ril@morticia.inmos.co.uk>
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distribution: world
organization: SGS-Thomson Microelectronics Ltd, Bristol.
keywords: make
newsgroups: gnu.gcc.help