🚀 go-pugleaf

The current machine description for the DEC Alpha is based on the EV4
documentation i.e. for the Alpha 21064/66 processor. In the new Alpha
(21164)
several things changed, especially now there are two pipelined floating
point
and two pipelined integer instruction units. These units aren't identical
but they can execute a common subset of instructions (float and int
seperately):

integer  instruction unit 0 can do logical, add, load and shift and mult
operations
integer  instruction unit 1 can do logical, add, load and branches 

(The lists are incomplete)

How could you specify this in the machine description? Can you do it at
all? 
The instruction units aren't completely identical. Just specifying
function units
for the common instructions doesn't help either as you can't assign the 
other instructions to their dedicated units (shift and mult to unit 0,
branch to unit 1).

Any idea? Is somebody else working on the Alpha description, too? 

-- Martin

Martin Meyer                                                              
 mmeyer@dspace.de
dSPACE GmbH
Paderborn, Germany