🚀 go-pugleaf

Hi, I have a gcc problem which I haven't been able to solve myself.. 

This is a inline-assembly problem on the alpha: specifically, I'd like
to force some of the operands into specific registers.  On the alpha,
all registers are obviously created equal, so right now gcc seems to
allow just the general "r" constraint, but many of the cases where I'd
like to use inline assembly really would want a specific reg.. 

I took a look at the gcc sources (I'm at 2.5.8 right now), and the only
simple way I can see how to do this is to create a register class for
each register I'd want to use (potentially all of them), and preferably
(at least according to the comments) then create register classes out of
all the possible unions of these as well.  Sadly, that makes the number
of register classes go up to 2^64, which isn't exactly practical (even
just doing 31 integer registers as their own classes looks rather ugly). 

Anyway, what I want to do is mainly call PAL-code from within inline
assembly, and this will want arguments in specific regs.  What I can do
right now is something like this:

	__asm__ __volatile__(
		"bis %1,%1,$0\n\t"
		"call_pal xxx\n\t"
		"bis $0,$0,%0"
		:"=r" (result)
		:"r" (input)
		:"$0");

(the above may not be exact, but you get the idea: essentially moving
the argument there by force), but it would obviously be much nicer (as
well as resulting in better code) if I instead could say

	__asm__ __volatile__(
		"call_pal xxx"
		:"=r0" (result)
		:"0" (input));

and have gcc notice that "r0" specifies the register completely.  This
feature would probably be useful for similar things on most other RISC
processors as well. 

		Linus