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Article #49974Generating Alternate Space Load/Store instructions for SPARC
From: Koray Oner
Date: Thu, 02 Dec 1993 01:53
Date: Thu, 02 Dec 1993 01:53
40 lines
1843 bytes
1843 bytes
Hi,
In our SPARC multiprocessor we will be using Alternate Space Load/Store
instructions for testing the hardware and for doing some IO operations.
I have been trying to write macros which will generate assembly code for these
alternate space load/store instructions. I use asm command in these macros.
Below are my macros and a small test program. Is it correct? It seems it is
generating correct assembly code for the test program, but I am afraid that
in a larger program the macros may not produce correct code (I don't know the
details of gcc).
One other thing is that I explicitly used register %g0 to construct the
address. Is there a better way?
Thanks for your comments.
Koray
oner@paris.usc.edu
/*-----------------------------------------------------------------------*/
#define lda(asi,addr,var) \
asm volatile ("lda [%%g0+%1]%2, %0" : "=&r" ((int) (var)) \
: "r" ((unsigned *) (addr)), "i" ((int) asi))
#define sta(asi,addr,var) \
asm volatile ("sta %0,[%%g0+%1]%2" : : "r" ((int) (var)), \
"r" ((unsigned *) (addr)), "i" ((int) asi))
main()
{
int i;
unsigned *addr = 0;
lda(5, 0, i);
sta(5, 4, i);
printf("%d\n",i);
}
Technical Details
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<2djhre$ar@paris.usc.edu>Path:
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X-Google-Language: ENGLISH,ASCII-7-bit X-Google-Thread: 11318c,6e45fa71af101f3b,start X-Google-Attributes: gid11318c,public X-Google-ArrivalTime: 1993-12-01 18:20:00 PST Path: arc1-ca.pugleaf.net!gmd.de!xlink.net!sol.ctr.columbia.edu!usc!usc!not-for-mail From: oner@paris.usc.edu (Koray Oner) Newsgroups: gnu.gcc.help Subject: Generating Alternate Space Load/Store instructions for SPARC Date: 1 Dec 1993 17:53:50 -0800 Organization: University of Southern California, Los Angeles, CA Lines: 41 Sender: oner@paris.usc.edu Distribution: usa Message-ID: <2djhre$ar@paris.usc.edu> NNTP-Posting-Host: paris.usc.edu Keywords: asm, gcc, SPARC