🚀 go-pugleaf

We have designed a chip that does not have scoreboarding for destination
registers.  Without going into why, let's just say that we are stuck with
what we've got.

So in the case where the destination of the load is a source in a
subsequent instruction:

	load (addr, r1)		// r1 <- MEM[addr]
	...
	add (r1, r2, r3)	// r3 <- r1 + r2

The scoreboarding jumps in and stalls until r1 is loaded.

However, in the case where the destination of the load is a destination
in a subsequent instruction:

	load (addr, r1)		// r1 <- MEM[addr]
	...
	add (r3, r2, r1)	// r1 <- r3 + r2

The scoreboarding ignores this hazard and sometimes r1 gets the value of
MEM[addr] and sometimes r1 gets the value of (r3 + r2).

Is there any feature in GCC that can help solve this problem?

My first order guess is that there could be an RTL pass that checks for
this hazard and emit an extra mov(r1, r1) to help ensure that the load()
finishes.

Ernest Hua
C-Cube Microsystems
eh@c-cube.com
408-944-6340