🚀 go-pugleaf

In tracing bugs in the ARM code backend for gcc, I have come across a strange
phenomenon, which only occurs in one place in one program.

In x.c.lreg:

(set (reg:SI 57)
    (plus:SI (mult:SI (reg/v:SI 36)
             (const int 4))
        (reg:SI 11 fp))) 13 {mult_accumulate}

then (after 2 deleted insns):

(set (reg:SF 61)
   (mem/s:SF (plus:SI (reg:SI 57)
        (const int -48))) 71 {movsf}

This is fine, as I have a multiply+accumulate instruction for the ARM, and
the mult_accumulate pattern in arm.md matches fine.

However, in x.c.greg onwards (x.c.jump2...) the pattern has become:

(set (reg:SI 12 sp)
    (mult:SI (reg/v:SI 4 r4)
             (const int 4)))

(set (reg:SI 0 r0)
    (plus:SI (plus:SI (reg:SI 12 ip)
            (reg:SI 13 sp))
             (const int 48))) 13 {mult_accumulate}

Now this is VERY odd.  How can the same pattern match '(plus:SI (mult:SI'
and also '(plus:SI (plus:SI' ?

What happens is that the insn template then generates a mult_accumulate
instruction instead of two additions, because 'mult_accumulate' should
only match '(plus:SI (mult:SI'.  It reads as:

(define_insn "mult_accumulate"
  [(set (match_operand:SI 0 "register_operand" "=r,=&r,=&r,=&r,=&r")
        (plus:SI
          (mult:SI (match_operand:SI 1 "arm_rhs_operand" "r,r,n,r,r")
                   (match_operand:SI 2 "arm_rhs_operand" "L,n,r,r,r"))
          (match_operand:SI 3 "arm_rhs_operand" "r,r,r,n,r")))]

Any help would be greatly appreciated.

Michael Ben-Gershon
mybg@doc.ic.ac.uk