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Article #51501

Re: Strange (non)insn matching behaviour

#51501
From: M Y Ben Gershon
Date: Wed, 12 May 1993 11:51
44 lines
2299 bytes
Further to my earlier posting (repeated below)...

------------------------------------ START --------------------------------
Can anyone explain why the following error occurs when compiling _divdi3 in
libgcc2.c, when there seems to be a perfectly good insn available?

./libgcc2.c:635: internal error--unrecognizable insn:
(insn 132 71 74 (set (mem:SI (pre_dec:SI (plus:SI (reg:SI 13 sp)
                    (const_int 16))))
        (reg:SI 12 ip)) -1 (nil)
    (nil))

This is the insn.  'index_constant' tests for an immediate operand
which satisfies abs(x) < 4096.  The 'J' constraint offers identical
behaviour.

(define_insn ""
  [(set (mem:SI (pre_dec:SI (plus:SI (match_operand:SI 0 "register_operand" "r")
                                     (match_operand:SI 1 "index_constant" "J"))))
        (match_operand:SI 2 "register_operand" "r"))]
  ""
  "*
  operands[1] = gen_rtx (CONST_INT, VOIDmode, INTVAL(operands[1])-4);
  return (arm_output_asm_insn (\"str\\t%2, [%0, %1]!\"));
")


I am working on the ARM version of gcc-2.3.3, having made a great
deal of improvements over the original so far, and having succeeded
in building a stage3 compiler - so this comes as a surprise.

Are there problems with pre/post inc/dec?  Should I not define
HAVE_POST_INCREMENT etc. to avoid problems?

------------------------------------- END ---------------------------------

Not defining HAVE_POST_INCREMENT etc in config/arm.h makes NO DIFFERENCE
AT ALL!

What on earth is going on then?


Michael Ben-Gershon
mybg@doc.ic.ac.uk / mybg@cs.huji.ac.il
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From: mybg@doc.ic.ac.uk (M Y Ben Gershon)
Newsgroups: gnu.gcc.help
Subject: Re: Strange (non)insn matching behaviour
Date: 12 May 1993 12:51:45 +0100
Organization: Department of Computing, Imperial College, University of London, UK.
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Sender: mybg@doc.ic.ac.uk (Michael Ben-Gershon)
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