🚀 go-pugleaf

I am currently writing a gcc machine description for an architecture which supports signed and unsigned integer addition.  In gcc RTL descriptions there is no notion of different types (signed or unsigned) for a particular mode (in this case SI single integer mode).  Gcc also does not support the uplus and uminus RTL expression although it does support umult and udiv.  How can I support unsigned addition and subtraction?

I realize that the plus and minus pseudo ops will give me the right answer for any given type but they will not necessarily give me the correct exception handling.  For example, the only difference between the MIPS add and addu instructions is that the signed version will signal an overflow exception whereas the addu never will.  I checked the MIPS machine description for generation of the add instruction and it never seems to get generated.  Any ideas?


		James