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Article #53683Re: gcc performance on sparcstations
From: Eliot Moss
Date: Tue, 06 Aug 1991 18:21
Date: Tue, 06 Aug 1991 18:21
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1781 bytes
Temper this by the fact that I have no hard evidence in front of me .... gcc 1.x versions do not have special support for instruction scheduling and delay slot filling. They do a passable job for the MIPS, SPARC, etc., but the additional support is necessary if you're to do as well as the best commerical compilers for those machines. The drop in performance is not tremendous in most cases -- something like 10% slower on the MIPS than the MIPS cc at high optimization levels, and 10-20% for SPARC as I recall. The good news is that gcc 2.0, soon to go into beta (though nobody knows exactly how soon) has support for the aforementioned optimizations required to produce good code for RISC machines. I have hitched my wagon to gcc's star, and recommend you do too. -- J. Eliot B. Moss, Assistant Professor Department of Computer Science Lederle Graduate Research Center University of Massachusetts Amherst, MA 01003 (413) 545-4206, 545-1249 (fax); Moss@cs.umass.edu
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X-Google-Language: ENGLISH,ASCII-7-bit X-Google-Thread: 11318c,3070459fc69dcd13 X-Google-Attributes: gid11318c,public X-Google-ArrivalTime: 1991-08-06 16:39:27 PST Path: arc1-ca.pugleaf.net!gmdzi!unido!mcsun!uunet!zaphod.mps.ohio-state.edu!samsung!crackers!m2c!risky.ecs.umass.edu!dime!dime.cs.umass.edu!moss From: moss@cs.umass.edu (Eliot Moss) Newsgroups: gnu.gcc.help Subject: Re: gcc performance on sparcstations Message-ID: <MOSS.91Aug6142121@ibis.cs.umass.edu> Date: 6 Aug 91 18:21:21 GMT References: <1991Aug6.171851.29108@cs.UAlberta.CA> Sender: news@dime.cs.umass.edu Reply-To: moss@cs.umass.edu Distribution: gnu Organization: Dept of Comp and Info Sci, Univ of Mass (Amherst) Lines: 21 In-reply-to: dwelly@saddle-lk.cs.UAlberta.CA's message of 6 Aug 91 17:18:51 GMT