🚀 go-pugleaf

The i860 version of gas uses the same relocation technique
as the SPARC version of gas.  The relocation information
structure is defined in i860.h.  Most of the RISC processors
have the same limitation in that the opcode length is fixed at
32-bits therfore cannot contain 32-bit addresses.  Several different
instruction types are used to overcome this with the following
load sequence being common:

	orh	ha%addr_expr,r0,r31
	ld.l	l%addr_expr(r31),r10

This loads the value at the symbol "addr_expr" into r10 using r31
as a temporary register.  Note the address is not known until link
time, so the object MUST maintain additional information for EACH
opcode to resolve it, i.e. high adjust, low, etc.  The i860 uses
signed addition when it adds l% to r31, so if bit 15 is set it
has the effect of subtracting from r31 and ha% must be incremented
by 1 at link time.

This i860 assembler was used with g++ to produce a.out files for
use with an EPROM burner.  The modifications to ld.c consist of
an ugly case statement (i860 has instructions which require
a split address field and doesn't fit the linker's MACRO design)
which I dropped to GNU twice, but never appeared in any version of
ld.c that I have seen.  This case statement could be used in any linker 
and parses the "extra" information hidden in the relocaton table.
As the output format code is separate, I would think one of the COFF
or ELF patches would also work.

You will also have the big/little endian problem.  I have a version of
the linker which converts all structures on reads and converts again on
all writes via MACRO's.  This will allow you to produce any combination
(I used one with Sun tools, the other for burns).  The assembler doesn't
care as it is byte oriented.