Help removing circular Make dependencies

Article View: gnu.utils.bug

Article #1671

#1671

From: Skip Montanaro
Date: Thu, 14 Dec 1989 01:03

26 lines
1153 bytes

I know this is a bug list, but there is no question list for GNU Make, so
here goes:

I have the following Makefile:

	FILES = foo bar

	.PHONY : compress uncompress Makefile

	compress : $(FILES:%=%.Z)

	uncompress : $(FILES)

	% : %.Z
		uncompress $@

	%.Z : %
		compress $<

There is an obvious circularity in my pattern rules, but it's also pretty
obvious (at least to me, not to Make) that on any given Make invocation I'd
only go in one direction. Is there a way I can express the dependencies to
get the desired behavior? If it's any help, I'm using GNU Make 3.57 under
SunOS 4.

Skip (montanaro@crdgw1.ge.com)

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From: montnaro@moose.crd.ge.com (Skip Montanaro)
Newsgroups: gnu.utils.bug
Subject: Help removing circular Make dependencies
Message-ID: <8912140103.AA00485@moose.crd.Ge.Com>
Date: 14 Dec 89 01:03:03 GMT
Sender: daemon@tut.cis.ohio-state.edu
Reply-To: <montanaro@crdgw1.ge.com> (Skip Montanaro)
Distribution: gnu
Organization: GNUs Not Usenet
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