Re: Where are delayed branches handled?

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#2688

From: Steve Schlaifer x43171 301/167
Date: Wed, 13 Aug 1986 16:45

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In article <299@vaxb.calgary.UUCP>, radford@calgary.UUCP (Radford Neal) writes:
> Something I've wondered about:
> 
> On RISC machines with delayed branches, who does the instruction
> rearrangement that tries to put useful instructions after the branch?
> 
> Obvious possibilities are the assembler or the compiler. Does anyone
> know whether the compiler can do a significantly better job than 
> the assembler? (I'm assuming the compiler generates assembler code.)

An optimizing assembler?  What a disaster that would be.  I want assemblers to
leave my code exactly as I wrote it.  Compilers on the other hand are
translating from high to low level languages, and have a long tradition
of performing all kinds of optimizations on the final results.  Moving
code to after delayed branches is just another kind of optimization.

To answer your question, the compiler is the only place where such
optimizations can reasonably be done.
-- 

...smeagol\			Steve Schlaifer
......wlbr->!jplgodo!steve	Advance Projects Group, Jet Propulsion Labs
....logico/			4800 Oak Grove Drive, M/S 156/204
				Pasadena, California, 91109
					+1 818 354 3171

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Path: arc1-ca.pugleaf.net!utzoo!mnetor!seismo!lll-crg!nike!cit-vax!elroy!smeagol!jplgodo!steve
From: steve@jplgodo.UUCP (Steve Schlaifer x43171 301/167)
Newsgroups: net.arch
Subject: Re: Where are delayed branches handled?
Message-ID: <823@jplgodo.UUCP>
Date: Wed, 13-Aug-86 12:45:20 EDT
Article-I.D.: jplgodo.823
Posted: Wed Aug 13 12:45:20 1986
Date-Received: Thu, 14-Aug-86 20:36:18 EDT
References: <299@vaxb.calgary.UUCP>
Organization: Jet Propulsion Labs, Pasadena, CA
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