🚀 go-pugleaf

In article <688@polaris.UUCP> josh@polaris.UUCP (Josh Knight) writes:
...
>>>On RISC machines with delayed branches, who does the instruction
>>>rearrangement that tries to put useful instructions after the branch?
...
>>
>>1) Ours is in the assembler, and I think most others are, also.  I haven't
>>seen one that was in the compiler; maybe others have and would say so.
> 
>I don't believe the PL.8 compiler for the 801 (or for the ROMP) generates
>assembly language.  I.e. any code movement to take advantage of delayed
>branches is done by the compiler.

Thanx for the note.  I reread the HP Spectrum papers and they seem to
be in the compiler also, although, as far as I could tell, fairly
late, i.e., peephole time.  Ours passes binary between compiler and assembler,
i.e., the "assembler" is really an ascii-binary conversion in front of the
the common assembler.  Maybe the real issues are:
	a) When you write handcoded assembler, do you get the optimizations
	or not?
	b) Is the pipeline scheduling early in the compilation, or late?
	(Regardless of the implementation, most cases seem to be late,
	i.e., peephole time, whether inside the compielr or the assembler.
	Of course, careful code generation helps the pipeline scheduler
	by careful choices of registers and other things.)  Now, does anyone
	have some instances where pipeline scheduling is done by, for
	example, the global optimization phase?
-- 
-john mashey	DISCLAIMER: <generic disclaimer, I speak for me only, etc>
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