Re: Where are delayed branches handled?

Article View: net.arch

Article #2703

#2703

From: Robert Alverson
Date: Fri, 22 Aug 1986 16:16

13 lines
1194 bytes

There is an aspect of this that I think people are missing.  If you let
the assembler take care of design-specific architectural features, then
those features can be more easily changed in the future.  I think the
MIPS-X assembler also does the instruction scheduling.  Of course, if
all your programs are in a HLL, scheduling in the code generator seems
as appropriate.  There are some people, though, who feel that a very
low level intermediate form (almost assembler) is desirable for its
independence across a family of machines.

Bob

echo $DISCLAIMER

Technical Details

Message-ID: <4955@decwrl.DEC.COM>

Path: arc1-ca.pugleaf.net!utzoo!mnetor!seismo!lll-crg!lll-lcc!pyramid!decwrl!alverson

References: <299@vaxb.calgary.UUCP> <823@jplgodo.UUCP> <20150@rochester.ARPA> <931@tekcrl.UUCP>

Show Full Headers

Complete Article Headers

Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP
Path: arc1-ca.pugleaf.net!utzoo!mnetor!seismo!lll-crg!lll-lcc!pyramid!decwrl!alverson
From: alverson@decwrl.DEC.COM (Robert Alverson)
Newsgroups: net.arch
Subject: Re: Where are delayed branches handled?
Message-ID: <4955@decwrl.DEC.COM>
Date: Fri, 22-Aug-86 12:16:01 EDT
Article-I.D.: decwrl.4955
Posted: Fri Aug 22 12:16:01 1986
Date-Received: Fri, 22-Aug-86 22:04:24 EDT
References: <299@vaxb.calgary.UUCP> <823@jplgodo.UUCP> <20150@rochester.ARPA> <931@tekcrl.UUCP>
Reply-To: alverson@decwrl.UUCP (Robert Alverson)
Organization: Digital Equipment Corporation
Lines: 13

Reply to Parent Message