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Article #2830

Re: Reasons For Large Main Memories

#2830
From: Jim Giles
Date: Fri, 12 Sep 1986 19:30
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In article <672@ur-tut.UUCP> tuba@ur-tut.UUCP (Jon Krueger) writes:
>...
>2) You find it unacceptable to wait for objects to page in, but it's
>acceptable to wait for the entire working set to be made resident
>every time you run the system or look at a new chip?  Seems like
>the latter will take a lot longer than the former.  Now you'll
>argue, "Sure, but it'll happen less often!"  How true.  It'll
>also happen less often that a user will examine an less-recently
>examined object than a more-recently-examined.
>...

This assumes that the CAD system is written VERY badly.  The system
should be able to function perfectly well without it's entire working
set.  It should only read in that part of the data which is required
to satisfy the users request.

"Aha!" you say.  "That's what virtual memory does!"  And you're right.
But, by making this paging a responsibility of the CAD system instead
of the hardware, you allow those applications which don't need virtual
memory to proceed without the overhead of a slow memory interface.

J. Giles
Los Alamos
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Message-ID: <7418@lanl.ARPA>
Path: arc1-ca.pugleaf.net!utzoo!mnetor!seismo!cmcl2!lanl!jlg
References: <1161@bu-cs.bu-cs.BU.EDU> <8529@duke.duke.UUCP> <672@ur-tut.UUCP>

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Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP
Path: arc1-ca.pugleaf.net!utzoo!mnetor!seismo!cmcl2!lanl!jlg
From: jlg@lanl.ARPA (Jim Giles)
Newsgroups: net.arch
Subject: Re: Reasons For Large Main Memories
Message-ID: <7418@lanl.ARPA>
Date: Fri, 12-Sep-86 15:30:44 EDT
Article-I.D.: lanl.7418
Posted: Fri Sep 12 15:30:44 1986
Date-Received: Sat, 13-Sep-86 21:08:00 EDT
References: <1161@bu-cs.bu-cs.BU.EDU> <8529@duke.duke.UUCP> <672@ur-tut.UUCP>
Reply-To: jlg@a.UUCP (Jim Giles)
Organization: Los Alamos National Laboratory
Lines: 23