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Article #1163Re: 68030 data cache vs. IO devices
From: Henry Spencer
Date: Thu, 09 Oct 1986 21:10
Date: Thu, 09 Oct 1986 21:10
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> ... Is there
> a mechanism for keeping certain (ranges of?) addresses from being
> cached? ...
The orthodox solution to the problem is to have a "don't cache" bit in
the page table entries, and have the MMU and the cache collaborate so
that pages with that bit on do not get cached. Given that both the MMU
and the cache are on-chip in the 030, that is probably what Motorola
has done. (I don't remember the PMMU specs well enough to know whether
it has provisions for this...)
--
Henry Spencer @ U of Toronto Zoology
{allegra,ihnp4,decvax,pyramid}!utzoo!henry
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Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Posting-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: arc1-ca.pugleaf.net!utzoo!henry From: henry@utzoo.UUCP (Henry Spencer) Newsgroups: net.micro.68k Subject: Re: 68030 data cache vs. IO devices Message-ID: <7213@utzoo.UUCP> Date: Thu, 9-Oct-86 17:10:09 EDT Article-I.D.: utzoo.7213 Posted: Thu Oct 9 17:10:09 1986 Date-Received: Thu, 9-Oct-86 17:10:09 EDT References: <1007@zog.cs.cmu.edu> Organization: U of Toronto Zoology Lines: 13 Keywords: Apparent incompatibility