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Article #52

Burst access mode (Was 68000 Memory Management (patent 4,527,232))

#52
From: lars
Date: Tue, 14 Oct 1986 09:18
28 lines
1630 bytes
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>> Using the untranslated addresses as the RAS addresses and doing the MMU
>> address translation before the column addresses are needed for CAS sounds
>> pretty general to me.

There is interesting problem here.  If the processor uses burst mode
you can not use the untranslated part of the address as row adress.  This
is because the burst uses adress bits 3 and 4 as the low bits in the
column adress.

There might be a sollution to this.  If the MMU page size is 4096 bytes,
12 bits in the adress is untranslated.  Of these, 2 bits are used
for byte select (I think this is true for 68030).  Remains 10 bits.
2 bits are used for the burst mode.  Remains 8 bits.

In other words, the row adress must not be bigger than 8 bits.  This 
sets the max size of memories to 64 kbits, or maybe 64k x 4 bits.

By the way, NS32332 uses burst mode.  We have used this burst mode in
our computer since june.
-- 
______________________________________________________
    Lars Pensjo
    {decvax,philabs}!mcvax!enea!chalmers!myab!lars
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Path: arc1-ca.pugleaf.net!utzoo!mnetor!seismo!mcvax!enea!chalmers!myab!lars
References: <508@elmgate.UUCP> <64@mit-prep.ARPA>

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Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP
Path: arc1-ca.pugleaf.net!utzoo!mnetor!seismo!mcvax!enea!chalmers!myab!lars
From: lars@myab.UUCP (lars)
Newsgroups: net.micro.ns32k,net.micro.68k
Subject: Burst access mode (Was 68000 Memory Management (patent 4,527,232))
Message-ID: <150@myab.UUCP>
Date: Tue, 14-Oct-86 05:18:27 EDT
Article-I.D.: myab.150
Posted: Tue Oct 14 05:18:27 1986
Date-Received: Wed, 15-Oct-86 21:46:43 EDT
References: <508@elmgate.UUCP> <64@mit-prep.ARPA>
Reply-To: lars@myab.UUCP (lars)
Organization: Myab Gothenburg, Sweden
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